54F646 transceiver/register equivalent, octal transceiver/register.
Y Independent registers for A and B buses Y Multiplexed real-time and stored data Y ’F648 has inverting data paths Y ’F646 ’F646B have non-inverting data paths Y ’F646B i.
These devices consist of bus transceiver circuits with TRISTATE D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers Data on the A or B bus will be clocked in.
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